Ryzen vs i7 (Mainstream); Threadripper vs i9 (HEDT); X299 vs X399; Xeon vs Epyc

Discussion in 'Hardware Components and Aftermarket Upgrades' started by ajc9988, Jun 7, 2017.

  1. TANWare

    TANWare Just This Side of Senile, I think. Super Moderator

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    This is the way with life. All laptop are smaller less powerful than the desktop offerings at the time. So if you are waiting for the laptops to offer the power and performance of current desktop offerings it is a never ending cycle of wishing and waiting.
     
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  2. TANWare

    TANWare Just This Side of Senile, I think. Super Moderator

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    Putting a smack down on Intel;
     
  3. ole!!!

    ole!!! Notebook Prophet

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    8% IPC with 200mhz, i'd say its more 5% for most application and 100mhz at best for zen3.

    combine the L3 for 8 cores could be good for games and video/audio/photo editing but thats about it? this should increase latency for L3 yet again though
     
  4. TANWare

    TANWare Just This Side of Senile, I think. Super Moderator

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    I doubt Zen 3 will be the major uptick that Zen 2 was. That is ok for now, just having forward progression is what is important.
     
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  5. ajc9988

    ajc9988 Death by a thousand paper cuts

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    While decreasing latency of hopping to the I/O die for any comms to the other CCX on die and providing a larger pool to reduce memory calls with the larger latency hit.

    What's you basis for thinking 100MHz and 5 percent?

    AMD was rumored and achieved the 13-15% they were rumored to hit on the IPC for Zen 2. Yet you make a claim on what? That is going by SPEC testing. Anand covered it.

    If true, AMD Zen 3 could have 23-25% IPC over Zen, and more than that in floating point. And Zen4 is a larger rework.

    But back up that belief...
     
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  6. ole!!!

    ole!!! Notebook Prophet

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    i need a basis for making speculation? gotta stop your attacking attitude.

    you really think 200mhz is possible? that 200mhz is either pushing beyond the limit or within efficiency clock range, which is to say below 4ghz on an ES sample. i have 100% NO DOUBT what so ever we'll barely see a 100mhz when overclocked on the high end. I would love to be proven wrong because I am waiting for the "5ghz" cpu that has yet to come out from AMD.

    it's hard to believe IPC will go up 8% just by combine the L3 there must be more optimization made otherwise its just bs.
     
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  7. ajc9988

    ajc9988 Death by a thousand paper cuts

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    OK, first, a basis for speculation makes it a theory. Not having a basis is you talking out of your rear. Now I don't stop you from talking out of your rear, but I WILL point it out.

    Second, 4 layers of the stack will be done with EUV, hence a process refinement and change. That change allows for an 18% or so area reduction. Considering they are considering further increasing the L3, they would be confident the added latency is less impactful than any increase, if increased at all.

    Third, there is a 10% estimated power reduction on 7nm+. That means, using isopower/isoperformance graph, that the frequency will go up. You may have a point on it only amounting to 100MHz, but there is another possibility where you are wrong.

    If the majority of the die shrink is left unused, but they spread out what they can within the same package size, although not much, it can allow for higher boosts.

    Or they could use the space to go wider on the cores/pipeline, which would help to get that IPC gain.

    The truth is, there is enough information out there on process change and changes on design to say that it is possible, if not to the level of probable.

    Please, cite what underpins your belief put into form in that speculation from your rear.
     
  8. tilleroftheearth

    tilleroftheearth Wisdom listens quietly...

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    From what I can see, @ole!!! doesn't need to respond to your navel-gazing logic.

    From your own admission, he may be just as right as you at this point. :p

    Time will tell. :rolleyes:

     
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  9. ole!!!

    ole!!! Notebook Prophet

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    again with your forced opinion.
    remember the fiasco of glofo from zen to zen+?

    https://www.anandtech.com/show/1490...nology-massive-performance-power-improvements
    https://www.anandtech.com/show/1422...echnology-7-nm-with-higher-transistor-density

    boy would you look at that, going from 14 to 12nm nets you 10% performance increase with a 15% density. 7nm to 7nm+ gives ~same performance but improves efficiency by 10% and ~17% density.

    i mean 14nm to 12nm gets us a ~100mhz from zen to zen+, its a no brainer this 7nm to 7nm+ at best gives another 100mhz. of course TSMC might have better node when compared to glofo and end up with more mhz but i'll go with what we have here.

    also remember adoretv's 5ghz? he used the number and to calculate where he got his 5ghz from and thats his downfall. the number being advertised by TSMC/ glofo/ samsung are all within "efficient range" which is to say probably around 1.5 to 2.2ghz ish.

    once you go over 4ghz all those numbers such as 10% performance probably become like 1-2% so unless they 100% specify 10% performance improvement at 4.5ghz, i'll take it that its just another 50-100mhz.

    i mean there are definitely more to be desired and my speculation in the end is just that.

    given that we are enthusiasts after high ST performance who wouldnt want a 5ghz AMD CPU with another 10% IPC boost over current zen2. im talking in favor of AMD but he still manage to find something to be upset about.
     
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  10. ajc9988

    ajc9988 Death by a thousand paper cuts

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    And as you noted, tsmc is not GF. In fact the origen of the 5GHz numbers were using GF speed estimates. Also, remember my prediction, which was right overall on performance uplift, but wrong on frequency and IPC (I went high on frequency a little, low on IPC a little, but got damn loser to the money overall on performance uplift).

    And this is fanboy crap, which you insinuated in your last paragraph. This is you literally spouting off without a basis. When you explained yourself further, I addressed it.

    Also, do you remember the difference between TSMC 12nm and tSMC 16nm? It was pretty sizeable. Yet they are both 16nm iterations. So why are you using GFs nose shrink to see what TSMC's will be like? You could use TSMC's history, even looking at Maxwell to Pascal, to get a potential idea. But you chose the other.

    Now, here is the other reason your example doesn't apply: AMD only did a node shrink with no other substantial mods to the CPU, kept the footprint the same, and got 3% IPC and like 100MHz. So with more substantial changes to the die plus the shrink, you think no way to hit 6-8%. That boggles my mind, especially getting a 52% IPC with Zen, even though bulldozer sucked. 3% with Zen+. Around 15% on Zen 2, but then are saying no way to 6-8% on Zen 3.

    It's because of things like this I make you explain yourself. It shows where flaws in your rationality may exist. I explain myself for that same reason, so that my underlying facts supporting my claims can be challenged.

    You actually dig deeper when pushed. tiller reverts to childish BS when pushed and, at times, semantic games to try to push his ideas. In that way, you get and have more respect than him.

    Edit: forgot to mention you are talking two different libraries for the frequency pushed. The denser library, found in ARM chips, have lower frequencies, although for ARM server TSMC has shown 4GHz chips on the 7nm process, which is part of the speed difference. The HPC libraries are less dense. They also regularly achieve higher speeds. Now which do most of their customers use? Hmmm.
     
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