PLL Pinmod Overclocking Methods and Examples

Discussion in 'Hardware Components and Aftermarket Upgrades' started by moral hazard, Jun 24, 2009.

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  1. 2.0

    2.0 NBR Macro-Mod®

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    Strangely enough, it returns can't set BCLK. Wonder what the issue might be.
     
  2. moral hazard

    moral hazard Notebook Nobel Laureate

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    Did you try the -preview option?

    If you did, what did your preview file contain?

    EDIT: Also try changing set bytecount=0x18 (instead of set 0x16) in your definition file.
     
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    Preview file contained the following for 193

    Code:
    :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::    
    :: ics9lpr501sglf r-w everything file for 193Mhz                           
    :: Only commands starting with ">" are applied by r-w everything    
    ::                                                                   
    :: Can manually run this script with "rw\Rw /Command=ics9lprs397.rw"
    :: add /Logfile=Log.txt if want to see what rw does in detail       
    ::                                                                   
    :: Data below will be reversed of what setBCLK/rw PLL generator says:
    ::                                                                  
    :: Eg: setBCLK diagnosis window OR r-w "Clock Generator" appearance  
    :: 00 01 02 03 04 05 06 07   08 09 0A 0B 0C 0D 0E 0F                
    :: 10 11 12 13 14 15 15 17   [      local3         ]                
    :: [      local4         ]   [      local5         ]                
    ::                                                                  
    :: Converts to be in the following format below                     
    ::                                                                  
    :: local0=0x0706050403020100                                        
    :: local1=0x0f0e0d0c0b0a0908                                        
    :: local2=0x1716151413121110                                        
    :: local3=..................                                         
    :: local4=..................                                        
    :: local5=..................                                        
    ::                                                                  
    :: NOTE: it is possible to read the PLL, perform bitwise changes    
    :: then write to the PLL but I found it freezes my system. Instead  
    :: I do a single hardcoded write which is very fast and reliable.   
    ::                                                                  
    :: If this freezes your box, then confirm that rw can read your PLL 
    :: by running 'rw\rw', command, 'smbus read block 0xd2 0 0x16' 
    :::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::   
                                                                        
    :: ics9lpr501sglf r-w everything file for 193Mhz 
    >local0=0x9190F0FF77FC0545  
    >local1=0xF2D1051C007D2710 
    >local2=0xC4B60323F2F4A823 
    >smbus write block 0xd2 0 0x16 
    >rwexit 
    
    When I go into rw everything and manually change the two bytes at 22 and 23, then hit write 28 bytes, it works.

    So I'm at a loss. Perhaps it is not loading rw everything with the bat file.
     
  4. moral hazard

    moral hazard Notebook Nobel Laureate

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    Do you get an error similar to this:
    Code:
    C:\Users\s\Documents\setpll10b2\setpll>setpll turbo 340
    
    setpll: request=340Mhz, PLL=turbo.
    setpll: sending#1 LUT@340Mhz (09) (19) (20) (1B) (1F) to the PLL via r-w everyth
    ing.
    setpll: sending#2 LUT@340Mhz (09) (19) (20) (1B) (1F) to the PLL via r-w everyth
    ing.
    setpll: sending#3 LUT@340Mhz (09) (19) (20) (1B) (1F) to the PLL via r-w everyth
    ing.
    setpll: sending#4 LUT@340Mhz (09) (19) (20) (1B) (1F) to the PLL via r-w everyth
    ing.
    setpll: sending#5 LUT@340Mhz (09) (19) (20) (1B) (1F) to the PLL via r-w everyth
    ing.
    Failed to set BCLK
    
    If you do, then I think there is a fix comming really soon (probably new setpll today). I will update the thread when it happens.
     
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    Yep, that's what it looks like.
     
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    Looks like the 9LPRS501 is unique enough that the 9LPR501 entry in SetFSB just won't cut it.

    Had a hard crash that corrupted the BIOS occur. I was able to recover by removing the RTC battery to reset the BIOS then restoring defaults in BIOS.

    Crash occurred when setting o/c back after resume from standby. Even so, I would get crashes when setting FSB back to 200mhz from 250mhz. Or vice versa. Or sometimes when scaling through the o/c from 200 to 250mhz.

    I don't know if it is worth the effort to have SetFSB develop a specific entry for the 9LPRS501PGLF. Looking at the datasheets of the two, I can't see a material difference. It might be the HDX just doesn't like FSB overclocking - however it is wired. A hard crash like the one mentioned requires a near complete disassembly of the HDX since there is no external access to the RTC battery. Entire system board has to come up. That's a 2-3 hour job with this computer thanks to all the screws and connectors. Most other notebooks can access the RTC battery via a panel. And even if they couldn't, their disassembly would only take about 30 mins at most.

    I've tried FSLx o/c which was a bust. This thing hates 266mhz FSB. BSOD before reaching the desktop, everytime. And that was at 12.5x @ 266mhz (T9300). What is interesting is that I was able to achieve ~3.325 Ghz using SetFSB (TME unlock) and Dual IDA enabled @ 13.5x, 247Mhz FSB with 1.2125v. It was stable enough to complete Intel Burn test with 5 runs at standard. With Dual IDA off (12.5x) anything over 255 FSB would freeze immediately upon being set.
     
  7. moral hazard

    moral hazard Notebook Nobel Laureate

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    There is an ICS9LPRS501SGLF entry in setfsb, might help?

    One thing you might want to try is leaving the RTC battery unplugged while testing. So that you wont have to take the notebook apart too many times.

    When you did the FSLx OC, where you sure your ram was stable and you had enough CPU voltage?
     
  8. moral hazard

    moral hazard Notebook Nobel Laureate

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    setPLL updated to version 1.0c:
    http://forum.notebookreview.com/har...clocking-methods-examples-84.html#post7153216


    revision.txt
     
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    In the shareware version? I was working with the freeware version, 22.134.98. That one has ICS9LPR501SGLF and HGLF (without "s" after the "r"). Those were the two I was using to test with but settled on the former.

    That's a good idea. I might do that next time. Though, when I do go back in to solder back the resistor, since it is on the topside of the mobo, it only takes about 30-40 mins to do. Where as, getting to the RTC battery adds another hour and a half. Really wish they had a hatch on this thing.

    RAM was good. Used 800Mhz RAM at CAS 6. as for CPU voltage, I was able to do 3.44Ghz on 1.2125v @ 255mhz FSB with Dual IDA 13.5x using TME unlocked method. Mostly stable at that speed and voltage. When I did FSLx, it would have been 12.5 x 266mhz FSB for 3.325Ghz on 1.2v. It should have at least made it to the desktop and maybe a freeze or something. But nope, just BSOD just before reaching the desktop every time.
     
  10. moral hazard

    moral hazard Notebook Nobel Laureate

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    I confused ICS9LPR501 with ICS9LPRS501.
     
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