That is a correct interpretation. By going with smaller chiplets, you increase yields drastically. As an example, let's look at Intel's 28-core behemoth on the 14nm++ node. With each "+", Intel decreases density, which allows for higher clocked frequencies. Even with that, Intel's 28-core only achieves around 35% yields. Why? Because by going so large with a monolithic die, you increase the chance of a critical defect occurring on the die, which then makes the chip unusable. Meanwhile, if you make a smaller chip, such as a 4 or 8 core, especially if the architecture allows for shutting off cores completely, allowing for you to make it a 6-core chip, or similar, then you can get actual and effective yields up during the manufacturing process. Now, for AMD, and this is only used as a comparison for what Intel is going to adopt, they were achieving in the mid-80s or higher on yields on GF 14nm, a very mature node (same with 12nm). Now, with moving the I/O and IMC off of the core die, if a critical defect hit any of those, the chip would be useless. Even non-critical defects could slow the memory controller's capabilities or you would have reduced PCIe lanes, etc. So by moving those hard to shrink components off, you reduce the R&D costs to reach a new node, reduce the risks of critical and non-critical defects hitting the die, and reduce the die size considerably, allowing for the core die made on the new node to be smaller so each wafer produces both a higher actual and higher effective yield. This is why AMD is rumored with Zen 2 to be achieving a 70% yield on TSMC's 7nm process. That comes up to, if the 70% is actual yield, approximately 506 good dies per wafer, which each wafer for 7nm (or Intel's 10nm) costs around $11,000. That means AMD is yielding around $22.50 per core die on 7nm! That would be 126 32-core CPUs per wafer! Meanwhile, Intel's 35% yield on a mature wafer that costs around $6000 is a problem. That is why Intel's extreme core count CPUs cost so much. Now, that doesn't mean Intel's problems are solved by disintegrating the cores into separate dies with chiplets. Intel is rumored to, even with 2 and 4 core chips, have problems with yields on 10nm. They are working on it, but until they show more than 4-core chips, which isn't really even planned for this year as they are primarily using it on mobile "U" and "Y" chips and will have a Xeon server offering that will sit in between the 14nm Cooper lake and the 14nm Cascade lake. This means they are not likely doing a full lineup of 10nm chips for servers, and no plans were shown to suggest Rocket Lake will be on 10nm. That, however, does not mean they are not working on accelerating 7nm. By all accounts, they may have 7nm up and running for volume in 2021 (protected forward looking statements under securities law). If they have that, theoretically, they may be able to achieve a higher density than TSMC's 5nm, which will be offered in volume in 2020, but that AMD is not expected to adopt until 2021, while 3nm may not be offered by TSMC until 2023 (unless they successfully move 5nm fabs over to 3nm ahead of the new fab they are building for 3nm). Samsung, however, is expected to offer 3nm in 2021. Intel, TSMC, and Samsung are the last standing cutting edge fabs. IBM sold to GF. GF, after not getting AMD 7nm deal mentioned shopping for a buyer months ago. So, that leaves those big three. If Intel cannot get 7nm to go off without a hitch, then there is a real possibility of there becoming just two large fabs: TSMC and Samsung. Hell of a thing to think about, right? Now, that is not discussing Intel's architectural engineering, which is awesome. Rather, it is saying that they have major process issues at the moment, which if not resolved, may require them to go fabless.