And, Intel has issued Security Updates...with INTEL-SA-00290 being of primary interest as it applies to the NetCAT DDIO & RDMA vulnerabilities. National Cyber Awareness System=> Current Activity Landing => Intel Releases Security Updates https://www.us-cert.gov/ncas/current-activity/2019/09/10/intel-releases-security-updates Intel Releases Security Updates Original release date: September 10, 2019 "Intel has released security updates to address vulnerabilities in multiple products. An attacker could exploit one of these vulnerabilities to gain an escalation of privileges on a previously infected machine. The Cybersecurity and Infrastructure Security Agency (CISA) encourages users and administrators to review Intel's Security Advisories INTEL-SA-00290 and INTEL-SA-00285 and apply the necessary updates." INTEL-SA-00290 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00290.html Summary: "A potential security vulnerability in some microprocessors with Intel® Data Direct I/O Technology (Intel® DDIO) and Remote Direct Memory Access (RDMA) may allow partial information disclosure via adjacent access. Vulnerability Details: CVEID: CVE-2019-11184 Description: A race condition in specific microprocessors using Intel (R) DDIO cache allocation and RDMA may allow an authenticated user to potentially enable partial information disclosure via adjacent access. CVSS Base Score: 2.6 Low CVSS Vector: CVSS:3.1/AV:A/AC:H/PR:L/UI:R/S:C/C:L/I:N/A:N Affected Products: Intel® Xeon® E5, E7 and SP families that support DDIO and RDMA. Recommendations: Partial information potentially disclosed through exploitation of this vulnerability could be utilized to enhance unrelated attack methods. For published exploits that Intel is aware of, Intel recommends users follow existing best practices including: Where DDIO & RDMA are enabled, limit direct access from untrusted networks. The use of software modules resistant to timing attacks, using constant-time style code. Security Best Practices For Side Channel Resistance: https://software.intel.com/security...curity-best-practices-side-channel-resistance Guidelines For Mitigating Timing Side Channels Against Cryptographic Implementations: https://software.intel.com/security...hannels-against-cryptographic-implementations Acknowledgements: Intel would like to thank Michael Kurth, Ben Gras, Dennis Andriesse, Cristiano Giuffrida, Herbert Bos, and Kaveh Razavi from VU Amsterdam for reporting this issue. Intel, and nearly the entire technology industry, follows a disclosure practice called Coordinated Disclosure, under which a cybersecurity vulnerability is generally publicly disclosed only after mitigations are available."