^1 OC (hardmodding) PLL means large overclocking increments eg: 166/200/233/266/400 FSB. setfsb overclocking TME-unlocked PLLs means can use 0.3Mhz increments up to the point of instability.
^2 not necessary other than for convenience. Could have just used setfsb overclocking.
^3 theory requires implementation
Note: grub2 bootloader overclocking a TME-unlocked PLL means OS-independent overclocked state. Only provision is would need Linux, prefereably Ubuntu 9.10 or newer, installed to be able to compile and use it.
WARNING: The information on this thread is for educational purposes and following any instructions may void your warranty and also cause major damage to your notebook. If you don't know how to monitor system temperature and what the tjmax of your CPU is then please skip this.
Configuration used
- Toshiba Tectra A9. T7300 2Ghz CPU. PM965 Santa Rosa Chipset using FSB=800Mhz. DDR2-800 RAM.
- In my particular case I had a TME on my PLL enabled, which was disallowing overclocking of the PLL.
Requirements for overclocking
- identify which PLL the notebook uses, then to download the datasheet for it.
- Setfsb overclocking software. It's Diagnosis window useful to also read/write to the registers of the PLL.
Problem with setfsb
First problem was setfsb didn't have an exact match for my system's PLL ICS9LPR501SGLF PLL. So the closely matched ICS9LPR501HGLF was used instead. I press getfsb which does read the right frequency. Then I move the slider (top slider) a little bit and then press setfsb. The HDD lights up, I can move the mouse but not interact with anything. Then a few seconds later I get the BSOD and then the laptop restarts. This happens even if I don't move the slider, just press getfsb then setfsb. This also happens when I "Select source for SATA clock" to be "Sata = PLL2" That is, change bit 1 of byte 0 to 1. Which is what setfsb tries to change, among other things, but this is where it goes wrong. So the reasons setfsb didn't work for me are:
1. My TME strap status (read only) reads 1 = no overclocking.
2. System would lock up due to setfsb's ICS9LPR501HGLF overclock changing the SATA clock from PLL main to PLL2
Hardware mod to disable TME mode
I proceeded to use method 1 in Nando4's guide below, requiring hardware modification to overcome the TME mode. The method being preferred to method 2 as
- pin4 TME/PCI pin was easier to pinmod than pin57 FSLb pin
- setfsb allows 1Mhz overclocking increments whereas method 2 is less probable 33/66Mhz overclocking
This also required Abo to supply a new setfsb for my ICS9LPR501SGLF to correct the SATA clk issue.
Here are photos of my PLL: before | after and after the modification.
Basically as you can see from the photo I found that next to the resistor there was a GND pad and a pad that was connected to the TME pin (pin 4). I found this by using a multimeter. I tested points on the motherboard with the system chassis to find GND. I tested points on the motherboard with the pin 4 (TME pin) to find the second pad.
So I removed the resistor and put it into the new position. I did some tests with a DMM to check my work and then closed the laptop back up. I started the laptop and it’s working perfectly, the best part is that now TME = 0, confirmed by reading the TME_READBACK register 9 bit 6 being 0.
I used setfsb to increase the fsb a little, and I took a picture of my screen with a camera since setfsb causes my laptop to freeze. After the laptop restarted I then manually copied the register values that I saw in my camera to setfsb, except I did not change the source for the SATA clock. So bit 1 of byte 0 is 0. Then when I pressed apply it worked without freezing my notebook. Here is the screenshot.
Overclocking after TME pinmod was applied
I sent an email to Abo (creator of setfsb) and provided this info to him. He then gave me a test version that adding ICS9LPR501SGLF PLL support. The only difference now with setfsb between ICS9LPR501HGLF and ICS9LPR501SGLF is that the bit that is used to select the source for the SATA clock is unchanged in SGLF.
Now using setfsb I was able to overclock my FSB to over 250mhz, my CPU frequency went from 2ghz to over 2.5ghz and is stable without and modifications to ram timings. This is lucky on my part. The RAM must be quite tolerant to run using the 333Mhz SPDTable timings and still work. It has been recommended that at the very least the primary RAM timing, CAS, be increased to ensure stability and allow me to overcome any RAM timing wall with overclocking. This would be done using spdtool or Thaiphoon Burner.
Below are some screenshots of successful overclocking. Here is an album of successful OC screenshots.
Be sure to check The Undervolting Guide that can be found on this forum. Undervolting may be possible after an overclock but it will make the overclock less likely to be stable. There is a second guide Advanced Undervolting (using superlfm mode) with a slightly different approach. This guide is now listed on one of my favorite sites (this site has helped me overclock another one of my notebooks): http://repair4laptop.org/
NOTE: My posts on this thread have all been edited and some deleted to clean up this thread and make information easier to find, being careful to ensure others' comments do not appear to be talking to themselves. Thanks go to nando4, for providing so much usefull information and guidence.
=============================================== Overclocking a system that has a TME Locked PLL
Author: nando4
Method 0: Pinmod overclock from 200->266Mhz
Before attempting anything else below, it might be worthwhile seeing if you can pinmod the CPU into 266Mhz operation. Naton explains [click pic on right for visual understanding] "The 200 -> 266 consists on connecting the two holes A23 and B23 on the CPU socket with a copper wire, or B23 and B24 with a copper wire. I haven't tried this myself". If it works likely to lock your multiplier at lowest setting.
Otherwise continue reading steps below with steps explaining:
- how to check if your PLL is Trusted Mode Enabled (TME), indicating setfsb OC less likely to work
- method 1: disabling TME mode via hardware so setfsb can work
- method 2/3: two hardware overclocking methods workarounds when there is a TME locked PLL
- how I believe abo got setfsb to work even with a TME locked ICS9LPRS355 PLL
Overclocking methods 1 and 2 below boot your system and set your northbridge, X3100, chipset and CPU internally to *believe* they will be receiving 200Mhz timings. They just are being sent faster signals from the PLL instead (266Mhz in method 2's case!!). This could present a problem with your RAM. DDR2-667 RAM will now be receiving timing signals for 266Mhz/887Mhz operation, yet still be using the SPD table for 667Mhz operation. In which case, I hope you've got good ram to test, or can use Thaiphoon Burner or SPDTool to slow down *at least* the CAS timing in your RAM's eeprom SPD table by increasing it's value. I believe it's CAS=6 for 800Mhz operation.
Checking if your PLL is Trusted Mode Enabled (TME - No Overclocking)
Right: the status of TME_READBACK tells us if TME is enabled. Screenshot shows it's status on register 9 bit 6, shown as 65h=1100101(binary) bit 6=1, meaning no overclocking. In the next screenshot it is shown how to write a 0 to the PCI2 Output Enable register. If your system freezes after doing this then it uses the PCI2 signal for it's operation and it's not possible to pinmod the TME/PCI2 pin to remove the hardwired TME_Enabled mode, so continue to method 2. If the system works after the write, then refer to method 1 below.
Both the ICS9LPRS355 and ICS9LPR501SGLF PLLs read TME_READBACK in this way, so it's highly likely other ICS PLLs do too.
Method 1: Disabling TME mode to allow setfsb overclocking
setfsb homepage informs us that a PLL ICS9LPR501HGLF is supported. So if the TME is disabled by setting PCI2/TME pin4 logic to 0 (GND), then setfsb can all software overclocking. Only problem here is *IF* your system uses the PCI2 signal after boot, in which case it won't work. I used setfsb setting ICS9LPRS355 PLL register 02, bit 2=0 to disable PCI2 output (enabled by default), and my system worked fine afterwards. This hardware TME-disabling hardware mod can be easily reversed:
(1) lift right side of the resistor leading from pin4 (blue) as shown in above picture using a soldering iron. Right side has more room and is easier if your right handed. Then can use the lifted resistor leg to attach a GND wire to. Try to minimise soldering iron contact with your multi-layered systemboard as much as is conveniently possible.
(2) Connect lifted resistor leg to a (logic 0) GND, found by continuity testing points against the system chassis.
(3) Put some insulation tape below the lifted resistor end so it won't short the board if pressed down.
(4) Test to see if it boots up. If not, reverse process and try method 2 or 3.
Method 2: Hardwired PLL for higher FSB
Overriding PLL Frequency
current operation, FSB=800Mhz
desired overclock, FSB=1066Mhz red shows the PLL pin of interest
Hardware overclocking by modifying PLL input pins for a faster FSB is discussed here-1 and here-2. We can see the PLL's FSLC/FSLB/FSLA and the CPU's BSEL2/BSEL1/BSEL0 are tied so when the BSEL signals are sampled by the CPU and in a non-compatible range, it will lock the multiplier. The *reserved* L/L/L CPU value then begs the question, does the Santa Rosa chipset have undocumented 1066Mhz FSB mode? Something that Method 3 below would use. To set the PLL to run at 266Mhz, you need to
(1) separate the Pin57 FSLb pin from board.
(2) set FSLb=0 by connecting to GND, eg: pin58.
This would be most easiest if there is a resistor leading off the Pin57 track. What I can see is it looks as if it goes to a through hole, which disappears somewhere. If my observation is correct, you'd either need to follow that through hole and see if it leads to a resistor, or otherwise use a blade to disconnect the PLL's pin57 from the board and then connect it to pin58 (GND), putting some insulation tape below Pin57 so it doesn't make contact with it's original connected track, a logic of 1 (3.3V). Fiddly work.
Method 3: Separate BSEL/CPU signals and BSEL PLL/RAM/Northbridge signals
PM45 valid FSB
PM965 valid FSB
Left: 1066Mhz-spec FSB CPU's BSEL settings from Intel C2D 45-nm CPU datasheet. Compare this against the BSEL of 800Mhz-spec FSB CPU's BSEL settings as shown in method 2 above. Middle: 800Mhz-spec FSB CPU's BSEL pin as highlighted from Intel C2D CPU's based on 965 express familydatasheet Right: FSB capability comparison between the PM45 chipset that does support 1066Mhz FSB and the PM965 chipset that doesn't officially support 1066Mhz FSB (max=800Mhz). Anyone trying this mod is in a sense hopeful that the MCHBar functionality still exists if trying the PM45's BSEL selection on a PM965 system.
The potential application here is two fold:
1/ to attempt to pinmod a 1066Mhz CPU to function on a Santa Rosa 800Mhz platform. A 1066Mhz CPU has a BSEL signal H/L/H - 200Mhz mode that is the the same as the Santa Rosa 800Mhz FSB platform. So if the CPU was installed, it should theoretically work, so long as the pinouts are compatible.
2/ suggestion that perhaps the Santa Rosa platform has an undocumented 1066Mhz mode, which could setup by following the same BSEL settings used by the PM45-based CPUs for the PLL/GMCH but using the 800Mhz BSEL settings on PM965-based 800Mhz-only CPU to prevent multiplier lock-out. (This is hopeful!)
It's worth trying anyway and falling back on method 2 + modified RAM timings if unsuccessful. This is *THEORETIC* hardware overclocking based upon reading of the datasheets for the PLL, chipset and CPU and may or may not work. Anyone whose system is out-of-warranty prepared to try it?
The idea here being to set acceptable BSEL2/BSEL1/BSEL0 CPU signals so it doesn't apply multiplier locking, whilst sending a different set of BSEL signals to then rest of the system (CPU/PLL/Northbridge) to support a higher FSB operation. The reserved L/L/L BSEL2/1/0 on a 800Mhz FSB-spec CPU suggest the chipset could perhaps support an undisclosed 1066Mhz mode? Worth investigating if you have the time and patience. How to do this? CPU datasheet advises that BSEL2/1/0 are output pins so suggest:
(1) isolate the BSEL1 CPU pin from the circuit.
(2) run a logic 1 (3.3V) signal to BSEL1 . Test if this is necessary as it's supposedly an output pin.
(3) connect a 0 (GND) signal to PLL FSLb pin. Test if this is necessary as sometimes a disconnect is the same as a 0.
Explanation: (2) makes the CPU believe its running in 200Mhz (800Mhz FSB) mode so it doesn't apply multiplier clamping. (1) then hardwiring the output of BSEL1 logic as seen by any other chips (eg: PLL, northbridge, GM965) to operate in PM45's 266Mhz mode (1066Mhz FSB).
Please report if this works as if successful then it's proof that Santa Rosa has an undisclosed 1066Mhz FSB mode.
Additional: setfsb use with TME mode | Pros and cons of software/hardware set FSB
How Trusted Mode Enable (No Overclocking) was overcome with setfsb
setfsb's author Abo made a point of seeing the TME mode being enabled when adding support for HP 2510P's ICS9LPRS355. Advice upon which I was about to give up on overclocking. Yet a few days later out popped a test version of setfsb that works fine. The faster CPU frequency confirmed with CPU-Z, Linux/bogomips (if I warm boot into Linux after setting FSB in XP), Win7 WEI, and it is definitely faster as I've documented here.
Abo hasn't explained how he did it, but to me it looks like he is switching the clock SRC as shown in setfsb's diagnosis window here. We see register 0, bit2: SRC MAIN=PLL1(0) changes to PLL3(1) after setfsb use on ICS9LPRS355. Moving the slider then changes the VCO frequency dividers that are set using byte 14(PLL1)/OEh and byte 17(PLL3)/11h. Setfsb altering both PLL1 and PLL3 VCOs (why?). One sideeffect of overcoming this is that when the system is put into standby/hibernate, it resumes in a state where the PLL won't respond to setfsb requests. It requires another quick standby to unfreeze it. Strange, but minor inconvenience given the 533->667Mhz FSB overclocking it offers. I would suggest you try the ICS9LPRS355 PLL in setfsb if you are TME-enabled.
Hardwired overclocking versus setfsb/clockgen overclocking
Obvious advantage of using setfsb is it gives overclocking ability in increments of 1Mhz, so it's far easier to find system limits than when dealing in 33/66Mhz increments if modding the PLL's FSLx signals using method 2 or 3 below. Though hardware overclocking presents these advantages:
1/ software overclocking using setfsb requires a rerun when come out of hibernate/standby
2/ Linux overclocking with setfsb requires a boot into Win, a setfsb run, then a warm boot into Linux.
3/ RAM timings still believe they are working at the lower FSB so the RAM SPD_table may need slower timings
4/ X3100 Core Render clock is FSB dependant, reflected by sampled BSEL signals as shown here.
Hardwiring the PLL for faster FSB can overcome (1) and (2). If the chipset supports the higher FSB speed (eg: 533->800Mhz FSB overclock by Santa Rosa), then experimental method 3 above can overcome (3) and (4) whilst preventing multiplier lock-out. Though CPU would need to be very tolerant in such a higher overclock though.
=============================================== Theory: Using a series-4 penryn (Pxx00, T9x00, QX9x00) on Santa Rosa
Related to this overclock, there are *some* hints that a 1066Mhz series-4 chipset penryn (1066Mhz FSB) cpu could work with a Santa Rosa systemboard. I've put together some info that may help you if you want to try a T9400/T9600 1066Mhz FSB CPU:
1/ Pin-compatibility between 1066Mhz and 800Mhz penryns
We see they are directly pin compatible. Pics created by joining the two datasheet pinout pages together.
2/ BIOS compatible microcode
If it won't boot, then consider whether new bios microcode is required to support the series-4 penryn CPU. There are tools for various bios and knowledgable on wimsbios->My CPU isn't recognised, mydigitallife and rebelshaven bios modding forums.
I called intel at 1-916-377-7000 I talked to Tom from Level 5 tech support he assured me that the intel 965m can support the new cpu however GATEWAY and only gateway can make that happen if they provide bios support for the qx9300 mobile quad cpu
[QX9300 is a series-4 1066Mhz FSB quad-core CPU].
3/ Clocking the FSB at 1066Mhz on Santa Rosa platform
If the T9400/T9600 boots up, then the mobo will downclock the CPU since the only valid BSEL settings a PM965 chipset has is 133/200Mhz. A PM45 has 200/233Mhz BSEL settings, so it would set it at 200Mhz FSB, BSEL2/1/0 being L/H/L. If it worked out of the box at 1066Mhz FSB, then it would suggest the PM965 supports 233Mhz BSEL2/1/0 being L/L/L, though the chipset has this as "reserved". Can apply methods 0-3 above to increase from 800Mhz to 1066Mhz FSB on a Santa Rosa platform using setfsb and/or pinmods, or both if it's a TME-locked PLL.
kaltmond says: T9400 wont´t post in my PM965 nb, confirmed......
Chaz, the moderators closes the thread with Yeah, this thread has reached the end of its usefulness . . read the previous posts. 1066MHz FSBs do not work in the mobile 965 chipset. End of story.
Originally Posted by RickAbraham
I was talking with a bloke from a local PC repair shop and I watched him fit a T9600 processor into a Dell laptop running the PM965 Santa Rosa platform which is only 800MHz. The processor was fully compatiable which shocked me and I watched the machine boot up after the installation was complete. But what I want to know is are you going to get the full gain using a 1066 FSB when the chipset apparently doesnt support it. I have read on other forums that the PM965 refresh chipset is a freak some claim that it will support 8gb of ram and others claim 6gb of ram. Would the mobo downclock the CPU to 800 FSB or has anyone tested this upgrade and can prove that the chipset will run at 1066MHz ?? I am interested to find out.
If it works then can skip Montevina (Centrino 2) and then upgrade to 32nm tech!! Pls report your results.
Last edited by moral hazard : 01-28-2010 at 09:19 AM.
setfsb does not work with my laptop, I have emailed Abo and he can not support it. I have tried pretty much all software to overclock it. I have tried modifing the registers myself but I've had no luck. It seems almost impossible to do it with software. It is taking too long to figure out how to do it without a hardware mod.
I just wan't to do the oldschool thing and connect some pins and play with some resistors. can anyone please help?
ok i see the Chipset is not compatible ..sorry to intrude --post deleted
__________________
M17x R-2 --begging to be overclocked ....
Describe when you say SETFSB does not work on your laptop, there are occasionally a few things you can do to make it work, but we need more details for now.
Actually probably Abo is right. If you will check in ICS9LPR501 datasheet description of pin number 4 you will read :"3.3V PCI clock output / Trusted Mode Enable (TME) Latched Input. This pin is sampled on
power-up as follows
0 = Overclocking of CPU and SRC Allowed
1 = Overclocking of CPU and SRC NOT allowed
After being sampled on power-up, this pin becomes a 3.3V PCI Output". That's probably SetFSB it's not working in your case, because on power up this input is set as 1 and it's probably done by a some kind hardware lock, blockade; Using reesistor in the circuit to force voltage to be set up on level which ist read as logical 1 for clock generator. And if this dont scary you we can move forward. That's the russian web page:http://people.overclockers.ru/konstantin_n/record1 where you find description with photos how to unlock for overclocking clock gen ICS9LPRS365 which if you look on it datasheet: http://www.darksmileysystems.com/dow...RS365-SPEC.pdf have identical pinout like ics9lprs501. After this modification they ware able use setfsb for overclocking. That's probably what Abo refering to on his web site when he wrote about this ICS clock:"ICS9LPRS365BGLF (FS U9200 with the hardware remodeling".
Ok. But after this mod they did next one; Bsel mod from 166 to 200Mhz of course on clock generator. That's what I was able undersand from this site, but lets just say that my russian it's far worst then my english and my english isn't very good too; besides google translator it's not helping too/.
Ee Yaah I almost forgot and most important thing for You. I think that in your case changing from 200=266mhz it's just grounding FSLB pin 57 to neerest GND or connecting to FSA(10) or FSC(62). What i know signal "0" doesnt mean that on this pin thera no voltage at all it just mean that there're voltage on some certain lover level then on "1", but GND probably will work as well. And one more thing, that kind of mod was done by member of this forum :"Kaltmond" in his Clevo M570RU on clock generator ICS9LPR365DGLF, but like I said if you compare pinout of this two chips they are that same. You can find this thread here: http://forum.notebookreview.com/showthread.php?t=302873. I think he's the person with who you talk to.
Ok that's everything what I Can help You. God bless russian overclockers, google translator and russian girls
hi, I think that you mark wrong pins on the photo. This dot on the chip is probably for indicate pin number 1 if so your pin 57 and 58 will be on the other side of the chip( pin 7-gnd and pin 8-fsb from the top). That's what I thing
yes, you are right. I have made this mistake before.
let me tell you the story:
I wanted to do a simmilar modification on an older laptop but I was looking at the PLL upsidedown so I connected the wrong pins. I did this with solder and while I was trying to remove what I did, I damaged pins and it all wen't wrong. laptop never started again.
So you have saved me this time, thankyou. I always assume that they print the info on the PLL the right way up, but it seems they do it upsidedown.
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PLL mod, 200mhz to 266mhz help please
