PLL Pinmod Overclocking Methods and Examples

[User Retired 2]

@Agent 9 your SLG8SP553 PLL datasheet doesn't indicate any programmable registers so not sure if a TME-unlock + setPLL is even possible. You'd be experimenting to try to find out.

What is possible is a FSLx PLL pinmod like discussed at How to pinmod and further overclock the M11x R1 (SLG= Hardmod only) . 300Mhz would boot up OK but requires wiring a LOGIC 1 to FS_C, FS_B and FS_A. I doubt 333Mhz would boot but you could try by wiring a LOGIC 1 to FS_C. Your dual-IDA L9400 would be overclocked to:

300x8=2.40Ghz
333x8=2.66Ghz

I don't see any pci-e clock control either, in case you were looking to improve your DIY ViDock performance.

It's a shame you got the SLG PLL on your 2730P systemboard rather than the ICS one which has been successully TME-unlock PLL pinmodded here.

[Agent 9]

Thanks nando4... so that means my processor would be stuck at the 300Mhz bus speed if I were to do that mod? (so it wouldn't clock down to 266 or below when idling low, or would that still work properly?) I like the Dual IDA mod I have going because it is software controlled, and I can still put it in battery saving mode when I need it, and losing that efficiency for a slightly better processor speed isn't worth it to me [my priority is portability, and longevity on battery power, over raw speed]


I was hoping to be able to OC my pci-e bus so I could eek a bit more performance out of my DIY ViDock, but I guess I can't (it performs pretty well -a GTX 460, PE4L adapter, and the Corsair 430Watt PSU you recommended- I have a small thread going on TPCR -the sister site to NBR- where you can see the benchmarks so far DIY ViDock on Tablet PC's: experiences, benchmarks, setup, ect... ... though it needs to be updated)

[User Retired 2]

Thanks nando4... so that means my processor would be stuck at the 300Mhz bus speed if I were to do that mod? (so it wouldn't clock down to 266 or below when idling low, or would that still work properly?) I like the Dual IDA mod I have going because it is software controlled, and I can still put it in battery saving mode when I need it, and losing that efficiency for a slightly better processor speed isn't worth it to me [my priority is portability, and longevity on battery power, over raw speed]

A 266->300Mhz FSLx PLL pinmod would see you running a 300Mhz BCLK rather than 266Mhz. So your lowest multiplier would be 300x6=1.8Ghz. I'm running my L9400 at 266x8=1.86@0.925V (lowest) on DC, so you'd be able to do run 1.8Ghz without any problems and maintain your great battery life.

The 2.4Ghz AC dual-IDA overclock you'd get from this would also see you getting faster DIY VIDock performance since x1.Opt does CPU compression. Of course, a pci-e overclock would help further but I can't see your PLL being software programmable to allow it.

Great work on the TPCR DIY ViDock thread

[Agent 9]

ok, so then the processor would still be capable of throttling some (which is good) I think it would be worth a try then... only issue now is, how exactly do I do the mod? (so its pins 20, 2, and 7 for the FS_A/B/C respectively... but then what is the "LOGIC 1" you mentioned, and do I just connect all 4 of them to one another? (so they are all electrically tied together, or is it a different combination like A to B and C to Logic?)


I created the thread on TPCR because graphics power is the one big thing all Tablet PC's lack, and few people know about the DIY ViDovk, or don't know it can work with a Tablet PC; but I was sure to link some of your best posts so they can get the info they need (your in depth details, and guides are really great)

Thanks for your help with it all

[Holymartyr]

What is SetPLL? supplied by AnonyMouse

SetPLL is a wrapper over r-w everything to program a PLL. Advantages over setfsb being:

1. It's free - no Paypal US$10 donation cost to try an overclock.

2. It's much faster than setfsb in setting your FSB.

3. Unlike setfsb, to set the BCLK it's only writing to the PLL. A PLL read isn't needed so
there are no side-effects like sata controllers hanging.

4. The PLL data to be written is fully configurable to your specific requirements.

5. Has an optional resume-from standby/hibernate script to have an automated overclock.

*Download link* (1.89MB)

Note: SetPLL must be ran from command prompt (Press win + r, type cmd and press enter).

To use setpll proceed to



Supplied PLL definition files

Download link for just the PLL definition files.

System	PLL	Author	Min BCLK	Max BCLK
HDX 9000	ICS9LPR501PGLF	2.0	182Mhz	226Mhz
MSI GT627	ICS9LPR113AKLF	moral hazard	266Mhz	300Mhz
HP 2510P	ICS9LPRS355BKLF	nando4	112Mhz	183Mhz
Alienware M11xR1	ICS9LPRS387BKLF	maddi2k	266Mhz	357Mhz
Alienware M11xR2	m11xR2	DavyGT	133Mhz	233Mhz
HP 2530P	ICS9LPRS397DKLF	nando4	266Mhz	357Mhz
Macbook Pro 5.1	rtm875t-606	Darth NVader	100Mhz	200Mhz

Supported operating systems

Confirmed working with:

- Win7 x64
- WinXP x86

Assumed would work with:

- Win7 x86
- Vista x86/x64

and more...


Bugs

1. Dual-IDA mode sees chkcpu32-based 'cpu' reporting the frequency and multiplier off by
one multipler. This is just a reporting bug. The BCLK is still reported correctly.

2. if don't have battery in the system when resume-setpll.vbs starts up then will have a
startup error "line 26, char 1: Invalid procedure call or argument", since it requires
the PowerManagement module to do AC/DC profile switching. Install the battery to correct
this error.

Improvements

Could remove r-w from the picture by compiling Kravis' setfsb here: http://www.mediafire.com/?20takzgchf1hucg[/url] to support .lut user defined files.

Acknowledgments

Thank you to nando4 and maddi2k for testing the package and providing confirmed working
[PLL].lut example files. Jeff, author or r-w everything, for providing SMBUS read/write
ability with his package.

Very confused with these instructions. I can sorta understand them, but before I cut anything on my laptop i'd rather be sure of what to do.

Are the supplied pll files all ready to use? Do I just load that and set the shortcut in the startup forlder and be all ready, running at 2.07GHz?

[moral hazard]

Very confused with these instructions.

The latest instructions are here:
PLL Pinmod Overclocking Methods and Examples

Are the supplied pll files all ready to use?

Yes, but every system is different so even if the pll file for your pll is supplied you may need to change it slightly. This should be easy if setfsb works for your pll, because you can just copy the registers from setfsb into the pll file for setpll.

Do I just load that and set the shortcut in the startup forlder and be all ready, running at 2.07GHz?

Yes you can make a shortcut, I suggest reading this:
How to Use SetPLL to overclock your R2 over 166

[RickiBerlin]

@nando4 and other users

Unfortunately, you had me on this post not answered.

As my findings could also help other users (with BSOD or hard crashes), I put a link in this Treat.
The download in this post is directly responsible for HDX9000 changed by me.
However, anyone can draw from his knowledge and create his own reverse ramps.

With me running "SetPll1.0f" with my changes perfectly and without any crash.

My thanks also for the first time on "moral hazard" + Rep.
While it was never between us Koversation, but "this Treat" shows your leadership. Thank you so well!

Sorry for my English. Can not one. Everything is Google translator.

Here are some pictures
from the dual-boot system with VistaHP32bit and Win7Professional64bit.:

SPD Error and Hardwaremod:


Maximum value at Win7 (but stable) Stable to 3.4 GHz.


WEI Win7Professional64bit 3,4 GHz:


WEI in Vista HPx32 3,4 GHz: (I confirm full functionality for Vista)


My Shortcat for frequency up and down and the last "TrottleStop"version with my desired functionality:



Thank you to everyone involved, and do not forget the link ----> <---- click me!!!!!!

[lee_what2004]

Any idea on how should I proceed for Dell SXPS 1640 with P8700?
Clicked the Get FSB, but only get empty registers, shown in the screenshots.

As for SetPLL, I done the setpll -read and the result
SMBus Read: Mode=BLOCK, Address=0xD2, Start=0x00, End=0x10
SMBus error

[DavyGT]

I found the PLL for the Mac mini. It is a CY28445FXL. The datasheet is here. Here is the PLL and it's connection. Disconnecting pin 4 (FSA) would enable 200mhz FSB but I'm not sure if I can do it as it is shared to "48M", described as the fixed 48mhz output. Should I disconnect it?
Secondly, would creating a connection to ground with conductive ink from that pad the pin is connected to work?

[moral hazard]

Is the 48mhz for the usb clock?

I think I tried grounding that once, my netbook wouldn't post.