1810t TME MOD

[SimpsonHomer]

CULV BSEL mod doesn't lock you to lowest multiplier?

1810 owners take note. Alienware M11x achieves it's SU4100/SU7300 1.3->1.73 (200->266Mhz) overclock by altering the PLL's FSLx pins directly. Those pins are tied to the BSEL pins on the CPU itself. Seems the CPU+chipset *does not* go into lowest multiplier lockout, as is usually the case when applying BSEL mods to non-CULV CPUS.

Meaning, if anyone is willing, can try the same overclock method by:

1. flashing the DDR2 RAM to PC2-6400 spec so has a 400Mhz SPDtable entry as described here.
2. Applying a strong pull down resistor (2k to GND) to the PLL's FSLb pin to do a 200->266Mhz overclock. FSLb is pin 64 on the PLL as shown here).

This overclock would be preferred since then the rest of the system would be calibrated correctly for this higher FSB, ie: RAM would use the 400Mhz SPDTable instead of the 333Mhz SPDtable, X4500's core and render clock speed would be adjusted by the chipset correctly.

Once overclocked with these parameters, if the TME MOD has been applied, the system may be even capable of going beyond the 266Mhz FSB by using setfsb. You may still need more voltage to the CPU for it to be stable. If can disable speedstep in the bios, then perhaps the CPU can be booted up in the lowest multiplier, stable long enough to then load rmclock to up the CPU voltages for the various dividers.

More details on M11x's overclock is here. If anyone tries it, please report your results. It would be interesting to know how far a SU4100-1.3 or SU7300-1.3 can be overclocked.

I'd be interested to know if this could actually work. I have the SLG8SP513V PLL that doesn't work with the TME Mod.

[strumf666]

Anybody found a TME mod for SLG8SP513V?

[jonkheer]

So the connectors of the SLG8SP513V are different? i.e. i cannot use the mod as described in this topic to remove TME from SLG8SP513V?

Because i think i have the PLL SLG8SP513V, because the other PLL from the start post gives a PLL error when i load it in setFSB.

[strumf666]

Anybody? Nobody? I would really like to know

[Gaylord Fister]

Hmm, no love for the SLG8SP13V here?

According to this thread, the mod should be the same for the SLG8SP13V:

Acer Aspire One User Forum • View topic - Overclocking zg5, not easy but works.

What he describes is, in essence, changing the pullup on pin 11 of the PLL to a pulldown, same as this mod.

I will try this when I'm bored.

[Gaylord Fister]

OK so I was bored today ...

Here are my findings:

- my clock chip is indeed and SLG8SP13V
- the tme mod works - you can write to the clock registers with SetFSB
- hdd locks up on "small" clock change
- underclocking is possible - slider seems to work:



- FSB mod works, but the multiplier is locked at 6.0 by the BIOS. This seems to be the only possible mod so far.



- underclocking and then moving the clock back up - computer hangs
- maybe higher frequencies possible using fast ram (ddr2-1066). I tried to increase the RAM timings using MemSet, but the CL value seems to be locked. These s at acer (I'll call them acerholes from now on) made it really difficult for decent, hard working americans to overclock their machines. Anyone know a way to reprogram the SPD in windows 7?
- removing the idiotic black strip on the fan removes the buzzing sound. Much quieter now.

[Gaylord Fister]

Update: I just booted Linux to do a quick kernel compile (which is much quicker now), and /proc/cpuinfo showed this:

processor	: 0
vendor_id	: GenuineIntel
cpu family	: 6
model		: 23
model name	: Genuine Intel(R) CPU           U4100  @ 1.30GHz
stepping	: 10
cpu MHz		: 1733.000
cache size	: 2048 KB
physical id	: 0
siblings	: 2
core id		: 0
cpu cores	: 2
apicid		: 0
initial apicid	: 0
fpu		: yes
fpu_exception	: yes
cpuid level	: 13
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts rep_good aperfmperf pni dtes64 monitor ds_cpl est tm2 ssse3 cx16 xtpr pdcm xsave lahf_lm
bogomips	: 3457.88
clflush size	: 64
cache_alignment	: 64
address sizes	: 36 bits physical, 48 bits virtual
power management:

processor	: 1
vendor_id	: GenuineIntel
cpu family	: 6
model		: 23
model name	: Genuine Intel(R) CPU           U4100  @ 1.30GHz
stepping	: 10
cpu MHz		: 1733.000
cache size	: 2048 KB
physical id	: 0
siblings	: 2
core id		: 1
cpu cores	: 2
apicid		: 1
initial apicid	: 1
fpu		: yes
fpu_exception	: yes
cpuid level	: 13
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc arch_perfmon pebs bts rep_good aperfmperf pni dtes64 monitor ds_cpl est tm2 ssse3 cx16 xtpr pdcm xsave lahf_lm
bogomips	: 3457.82
clflush size	: 64
cache_alignment	: 64
address sizes	: 36 bits physical, 48 bits virtual
power management:

When I load the CPU in Windows (e.g. using Prime64), both CPU-Z and CoreTemp report only 1.6 GHz. So either the display is wrong or the multiplier is locked only in Windows. Anyone have an explanation?

[moral hazard]

Check EIST with throttlestop.

If EIST is disabled, that would mean the multi is stuck.

If EIST is enabled then you should be getting your higher multi.

If it's disabled you can try to enabled it.

[Gaylord Fister]

EIST is disabled and greyed out in throttlestop. What does this mean? Obviously it's enabled in Linux, because Linux switches between 1.6 and 1.73 GHz. Is there a software to enable EIST in Windows 7?

What I find weird is, why can my old Pentium M Dothan switch between 800 and 2133 MHz in small increments while the SU4100 can only switch between 1.2 and 1.3 GHz? Seems kinda pointless to me. Does the SU4100 have other power saving measures?

Another thing, when I run the prime64 blend test in windows, the hdd light turns on and the system hangs. I can still move the mouse pointer though. The other two tests run without errors.

In Linux, all prime64 tests work flawlessly and I've compiled a kernel with no problems. What gives?

[moral hazard]

Do you have a datasheet for your PLL?


I'm going to send a PM to the throttlestop author about that EIST thing.

Because if it's disabled and greyed out in throttlestop, it should also be disabed in linux (I think).